View 74LVC652_100957.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
74LVC652 Octal transceiver/register with dual enable (3-State)
Product specification Supercedes data of 1993 Dec 01 IC24 Data Handbook 1998 Jul 29
Philips Semiconductors
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
*FEATURES
* Wide supply voltage range of 1.2V to 3.6V * In accordance with JEDEC standard no. 8-1A * CMOS low power consumption * Direct interface with TTL levels * 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic
DESCRIPTION
The 74LVC652 is a high performance, low-power, low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment.
The 74LVC652 consist of 8 non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the `A' or `B' or both buses, will be stored in the internal registers, at the appropriate clock inputs (CPAB or CPBA) regardless of the select inputs (SAB and SBA) or output enable (OEAB and OEBA) control inputs. Depending on the select inputs SAB and SBA data can directly go from input to output (real time mode) or data can be controlled by the clock (storage mode), this is when the OEn inputs this operating mode permits. The output enable inputs OEAB and OEBA determine the operation mode of the transceiver. When OEAB is LOW, no data transmission from An to Bn is possible and when OEBA is HIGH, there is no data transmission from Bn to An possible. When SAB and SBA are in the real time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration each output reinforces its input.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25C; tr = tf v2.5 ns SYMBOL PARAMETER tPHL/tPLH fmax CI CPD Propagation delay An to Bn; Bn to An Maximum clock frequency Input capacitance Power dissipation capacitance per latch Notes 1, 2 CONDITIONS CL = 50pF VCC = 3.3V TYPICAL 5.0 150 5.0 45 UNIT ns MHz pF pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W) VCC2 x fi ) (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL VCC2 fo) = sum of the outputs. 2. The condition is VI = GND to VCC.
ORDERING AND PACKAGE INFORMATION
PACKAGES 24-Pin Plastic SO 24-Pin Plastic SSOP Type II 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVC652 D 74LVC652 DB 74LVC652 PW NORTH AMERICA 74LVC652 D 74LVC652 DB 4LVC652PW DH PKG. DWG. # SOT137-1 SOT340-1 SOT355-1
1998 Jul 29
2
853-2104 19803
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER 1 SYMBOL CPAB SAB OEAB A0 to A7 GND B0 to B7 OEBA SBA CPBA VCC FUNCTION `A' to `B' clock input (LOW-to-HIGH, edge-triggered) Select `A' to `B' source input Output enable B to A input (active LOW) `A' data inputs/outputs Ground (0V) `B' data inputs/outputs Output enable A to B input Select `B' to `A' source input `B' to `A' clock input (LOW-to-HIGH, edge-triggered) Positive supply voltage
CP AB S AB OE AB A0 A1 A2 A3 A4 A5
1 2 3 4 5 6 7 8 9
24 23 22 21 20 19 18 17 16 15 14 13
V CC CP BA S BA OE BA B0 B1 B2 B3 B4 B5 B6 B7
2 3 4, 5, 6, 7, 8, 9, 10, 11 12 20, 19, 18, 17, 16, 15, 14, 13 21 22 23 24
A 6 10 A7 GND 11 12
SV00767
FUNCTION TABLE
INPUTS OEAB L L X H L L L L H H H * OEBA H H H H X L L L H H L CPAB H or L H or L X X X H or L H or L CPBA H or L H or L X H or L X X H or L SAB X X X L X X X X L H H SBA X X X X X L L H X X H DATA I/O * A0 to A7 input input input un * output output input output B0 to B7 input un * output input input input output output FUNCTION isolation store A and B data store A, hold B, store A in both registers hold A, store B, store B in both registers real-time B data to A bus stored B data to A bus real-time A data to B bus stored A data to B bus stored A data to B bus and stored B data to A bus
un H L X
The data output functions may be enabled or disabled by various signals at the OEAB and OEBA inputs. Data input functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock inputs. = unspecified = HIGH voltage level = LOW voltage level = Don't care = LOW-to-HIGH level transition
1998 Jul 29
3
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
LOGIC SYMBOL
FUNCTIONAL DIAGRAM
21 OE BA
4 CP BA S BA B0 B1 B2 B3 B4 B5 B6 23 22 20 19 18 17 16 15 14 13 10 11 7 8 9
A A A A A A A A
0 1 2 3 4 5 6 7
B B B B B B B B
0 1 2 3 4 5 6 7
20 19 18 17 16 15 14 13
1 2 4 5 6 7 8 9 10 11
CP AB S AB A0 A1 A2 A3 A4 A5 A6 A7
5 6
OE AB 3
B7
21 3
OE OE S S
BA AB
SV00768
2
AB BA AB BA
LOGIC SYMBOL (IEEE/IEC)
23 C4 1 C5 22 G6 2 G7 21 3 3EN1 3EN2
22 1 23
CP CP
SV00770
4 1
w1 6 6 5D 1 7 7
4D 1 w1 2
20
5
19
6
18
7
17
8
16
9
15
10
14
11
13
SV00769
1998 Jul 29
4
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
LOGIC DIAGRAM
OE BA OE AB S BA CP BA S AB CP AB
V CC S D1 D
Y An
MUX D2 Q
FF n CP
V CC S D1 Y MUX D Q D2 Bn
FF n CP 8 identical channels
SV00771
1998 Jul 29
5
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VI/O VO Tamb tr, tf PARAMETER DC supply voltage (for max. speed performance) DC supply voltage (for low-voltage applications) DC input voltage range DC input voltage range for I/Os DC output voltage range Operating free-air temperature range Input rise and fall times VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V CONDITIONS LIMITS MIN 2.7 1.2 0 0 0 -40 0 0 MAX 3.6 3.6 5.5 VCC VCC +85 20 10 UNIT V V V V C ns/V
ABSOLUTE MAXIMUM RATINGS1
In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC IIK VI IOK PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage; output HIGH or LOW VI/O DC input voltage; output 3-State DC output diode current DC VCC or GND current Storage temperature range Power dissipation per package - plastic mini-pack (SO) - plastic shrink mini-pack (SSOP and TSSOP) above +70C derate linearly with 8 mW/K above +60C derate linearly with 5.5 mW/K VI t0 Note 2 VO uVCC or VO t 0 Note 2 Note 2 VO = 0 to VCC CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +5.5 "50 -0.5 to VCC +0.5 -0.5 to VCC +0.5 "50 "100 -65 to +150 500 500 mW UNIT V mA V mA V V mA mA C
IO IGND, ICC Tstg
PTOT
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jul 29
6
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIH HIGH level Input voltage VCC = 1.2V VCC = 2.7 to 3.6V LOW level Input voltage VCC = 1.2V VCC = 2.7 to 3.6V VCC = 2.7V; VI = VIH or VIL; IO = -12mA VO OH HIGH level output voltage VCC = 3.0V; VI = VIH or VIL; IO = -100A VCC = 3.0V; VI = VIH or VIL; IO = -18mA VCC = 3.0V; VI = VIH or VIL; IO = -24mA VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100A VCC = 3.0V; VI = VIH or VIL; IO = 24mA II IIHZ/IILZ IOZ IOFF ICC ICC Input leakage current Input current for common I/O pins 3-State output OFF-state current Power off leakage current Quiescent supply current Additional quiescent supply current per input pin VCC = 3.6V; VI = 5.5V or GND VCC = 3.6V; VI = 5.5V or GND VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND VCC = 0.0V; VI = 5.5V; VO = 5.5V VCC = 3.6V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC -0.6V; IO = 0 Not for I/O pins "0.1 "0.1 0.1 0.1 0.1 5 GND VCC*0.5 VCC*0.2 VCC*0.6 VCC*0.8 0.40 0.20 0.55 "5 "15 "10 "10 10 500 A A A A A A V VCC V VCC 2.0 GND V 0.8 TYP1 MAX V UNIT
VIL
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C.
1998 Jul 29
7
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF LIMITS SYMBOL PARAMETER Propagation delay An to Bn, Bn to An Propagation delay CPAB, CPBA to Bn, An Propagation delay SAB, SBA to Bn, An 3-State output enable time OEAB to Bn 3-State output disable time OEAB to Bn 3-State output enable time OEBA to An 3-State output disable time OEBA to An Clock pulse width HIGH or LOW CPAB or CPBA Set-up time An, Bn to CPAB, CPBA Hold time An, Bn to CPAB, CPBA Maximum clock pulse frequency WAVEFORM VCC = 3.3V 0.3V MIN tPHL/tPLH tPHL/tPLH tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPZH/tPZL tPHZ/tPLZ tW tsu th fmax Figures 1, 5 Figures 2, 5 Figures 3, 5 Figures 4, 5 Figures 4, 5 Figures 4, 5 Figures 4, 5 Figures 4, 5 Figure 2 Figure 2 Figure 2 1.5 1.5 1.5 1.5 1.5 1.5 1.5 - 1.5 1.0 7.5 TYP1 4.6 5.2 5.2 4.8 4.4 4.8 4.4 3.0 0.5 0 150 MAX 7.9 8.9 8.8 8.0 8.0 8.0 8.0 - - - - VCC = 2.7V MIN 1.5 1.5 1.5 1.5 1.5 1.5 1.5 3.0 1.5 1.0 - MAX 9.2 11 11 10 10 10 10 - - - - VCC = 1.2V MIN 1.5 1.5 1.5 1.5 1.5 1.5 1.5 - - - - TYP 24 26 27 20 10 20 10 - - - - ns ns ns ns ns ns ns ns ns ns MHz UNIT
NOTE: 1. These typical values are at VCC = 3.3V and Tamb = 25C.
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V VM = 0.5V * VCC at VCC t 2.7V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V VX = VOL + 0.1VCC at VCC < 2.7V VY = VOH - 0.3V at VCC w 2.7V VY = VOH - 0.1VCC at VCC < 2.7V
VI An, B n INPUT GND tsu VOH CPAB , CP BA OUTPUT th tsu th VM
VI An,B n INPUT GND t PLH V OH Bn, An OUTPUT V OL VM t PHL VM
VM tW 1/f max
VOL VOH B n, A n OUTPUT VOL
tPHL
tPLH
SV00773 SV00772
Figure 1. Input An, Bn to output Bn, An propagation delays.
Figure 2. An, Bn to CPAB, CPBA set-up and hold times, clock CPAB, CPBA pulse width, maximum clock pulse frequency and the CPAB, CPBA to output Bn, An propagation delays.
1998 Jul 29
8
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
AC WAVEFORMS (Continued)
VM = 1.5V at VCC w 2.7V VM = 0.5V * VCC at VCC t 2.7V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V VX = VOL + 0.1VCC at VCC < 2.7V VY = VOH - 0.3V at VCC w 2.7V VY = VOH - 0.1VCC at VCC < 2.7V
TEST CIRCUIT
VCC S1 2 x VCC Open GND
PULSE GENERATOR
VI D.U.T. RT
VO
500
CL
50pF
500
VI S AB , S BA INPUT GND t PHL V OH Bn, A n OUTPUT V OL VM t PLH VCC VM t 2.7V 2.7V - 3.6V VI VCC 2.7V
Test tPLH/tPHL tPLZ/tPZL tPHZ/tPZH
S1 Open 2 x VCC GND
SY00003
Figure 5. Load circuitry for switching times.
SV00774
Figure 3. Input SAB, SBA to output Bn, An propagation delay times.
VI OE AB INPUT GND VCC OE BA INPUT GND VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled tPLZ tPZL VM VX tPHZ VY VM outputs disabled outputs enabled tPZH VM VM
SV00775
Figure 4. OE inputs (OEAB, OEBA) to outputs An, Bn enable and disable times.
1998 Jul 29
9
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
APPLICATION INFORMATION
Real-time transfer; bus B to bus A Real-time transfer; bus A to bus B
BUS B
BUS A
SV00781
SV00782
OEAB L
OEBA L
CPAB X
CPBA X
SAB X
SBA L
OEAB H
OEBA H
CPAB X
CPBA X
BUS B
BUS A
SAB L
SBA X
Store A, B or A and B in one register
Transfer A stored data to B bus or B stored data to A bus or both at the same time
BUS B
BUS A
SV00783
SV00784
OEAB X L L
OEBA H X H
CPAB X
CPBA
SAB L X X
SBA X X X
OEAB H L H
OEBA H L L
CPAB H or L X H or L Isolation
CPBA X H or L H or L
BUS B
BUS A
SAB H X H
SBA X H H
Store bus A in both registers or store bus B in both registers
BUS B
SV00785
SV00786
OEAB H L
OEBA H L
CPAB
CPBA
SAB L X
SBA X L
OEAB L
OEBA H
CPAB H or L
CPBA H or L
BUS B
BUS A
BUS A
SAB X
SBA X
1998 Jul 29
10
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1998 Jul 29
11
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
1998 Jul 29
12
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
1998 Jul 29
13
Philips Semiconductors
Product specification
Octal transceiver/register with dual enable (3-State)
74LVC652
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 08-98 9397-750-04517
Philips Semiconductors
yyyy mmm dd 14

▲Up To Search▲

Price & Availability of 74LVC652

	To Download 74LVC652 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .